Multi Core Architectures

CP7154 MULTI CORE ARCHITECTURES L T P C 3 0 0 3
OBJECTIVES:
 To introduce the students to the recent trends in the field of Computer Architecture and identify performance related parameters
 To understand the different multiprocessor issues
 To expose the different types of multicore architectures
 To understand the design of the memory hierarchy
UNIT I FUNDAMENTALS OF COMPUTER DESIGN AND ILP 9
Fundamentals of Computer Design – Measuring and Reporting Performance – Instruction Level Parallelism and its Exploitation – Concepts and Challenges – Limitations of ILP – Multithreading – SMT and CMP Architectures – The Multicore era.
UNIT II MEMORY HIERARCHY DESIGN 9
Introduction – Optimizations of Cache Performance – Memory Technology and Optimizations – Protection: Virtual Memory and Virtual Machines – Design of Memory Hierarchies – Case Studies.
UNIT III MULTIPROCESSOR ISSUES 9
Symmetric and Distributed Shared Memory Architectures – Cache Coherence Issues – Performance Issues – Synchronization Issues – Models of Memory Consistency – Interconnection Networks – Buses, Crossbar and Multi-stage Interconnection Networks.
UNIT IV MULTICORE ARCHITECTURES 9
Homogeneous and Heterogeneous Multi-core Architectures – Intel Multicore Architectures – SUN CMP architecture – IBM Cell Architecture. Introduction to Warehouse-scale computers, Cloud Computing – Architectures and Issues – Case Studies.
UNIT V VECTOR, SIMD AND GPU ARCHITECTURES 9
Vector Architecture – SIMD Extensions for Multimedia – Graphics Processing Units – Case Studies – GPGPU Computing – Detecting and Enhancing Loop Level Parallelism.
TOTAL : 45 PERIODS

OUTCOMES:
Upon completion of this course, the student should be able to
 Identify the limitations of ILP and the need for multicore architectures
 Discuss the issues related to multiprocessing and suggest solutions
 Point out the salient features of different multicore architectures and how they exploit parallelism
 Critically analyze the different types of inter connection networks
 Design a memory hierarchy and optimize it

REFERENCES:
1. John L. Hennessey and David A. Patterson, “Computer Architecture – A Quantitative Approach”, Morgan Kaufmann / Elsevier, 5th edition, 2012.
2. Darryl Gove, “Multicore Application Programming: For Windows, Linux, and Oracle Solaris”, Pearson, 2011.
3. David B. Kirk, Wen-mei W. Hwu, “Programming Massively Parallel Processors”, Morgan Kauffman, 2010.
4. Wen– mei W. Hwu, “GPU Computing Gems”, Morgan Kaufmann / Elsevier, 2011